DSP Dimensioning of a 1000Base-T Gigabit Ethernet PHY ASIC
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چکیده
This paper describes the strategy followed for dimensioning the coefficient width of the adaptive filters (FFE, echo and NEXT Cancellers) in a Gigabit Ethernet PHY Silicon implementation. These filters account for an important part of the circuit area and power consumption. It is therefore critical to ensure that they are properly dimensioned.
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تاریخ انتشار 2002